NXP Semiconductors /QN908XC /FLASH /TIME_CTRL

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Interpret as TIME_CTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PRGM_CYCLE0TIME_BASE

Description

flash operation time setting register

Fields

PRGM_CYCLE

Time base of some flash timing parameters, which represents 2 us. Default value is 64 cycles in 32 MHz (ahb clock). It is used in write and erase operations.

TIME_BASE

Max write operation times in one program, which are used to control Terase and Tme. User should set a pessimistic value to avoid possible error in erase/page erase operation. When user do write operation: It is used to limit allowed write numbers. (Max 21 ms-Tnvs-Tpgs-Tpgh-Tnvh)/18us = 1167 This register is only used when common write.

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